Abstract
A REVIEW ON GLITCH-FREE DIGITALLY CONTROLLED DELAY LINES
Priya Bahuguna* and Dr. Vishal Ramola
ABSTRACT
This paper presents different techniques for reducing glitch power in digital circuits. The aim of this study is to minimize glitch and to carry out a review of the literature and all other major information that are related with the glitch free Nand based digitally controlled delay lines. Various parameter effect and their variation is studied, the previously used techniques and previous work has been mentioned in this paper and also consists of findings and gaps present in previous approaches.
[Full Text Article] [Download Certificate]