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World Journal of Engineering
Research and Technology

( An ISO 9001:2015 Certified International Journal )

An International Peer Reviewed Journal for Engineering Research and Technology

ISSN 2454-695X

Impact Factor : 5.924

ICV : 79.45

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    NOVEMBER 2022 Issue has been successfully launched on 1 November 2022.




Mukthi. S. L* and Dr. A. R. Aswatha


Interrupt helps in communicating the processors and peripherals. But number of interrupt ports on processor are far less compared to interrupt signals from other processor and peripherals in a system on chip (SOC) design. This creates an serious issue in the multi-processor SOC design also. Interrupt Controller is the key solution to above problem. The function of Interrupt Controller is to sort the interrupt signals from peripherals and processor based on priority level and put forward the interrupt which has got highest priority for processing. The priority level assignment can be configured. In this proposed design, priority level is configured by software. The proposed design is also combining interrupts and then assert the interrupts to the processor. Our design can handle up to 60 interrupt signals from various peripherals and produces the 12 output signals. The AMBA AHB act as bus interface between processor and Interrupt Controller Formal verifications of the proposed Interrupt controller has been done.

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