Abstract
A REVIEW ON DOUBLE GATE MOSFET
Bharti Sharma* and Dr. Vishal Ramola
ABSTRACT
According to Moore's law number of transistors in a given area double in a period of around 18 months. Thus size of the devices need to be reduced continuously. With continuous down scaling of single gate MOSFET it resulted in aberration in its electrical characteristics like high off current, Vth roll-off, DIBL, sub threshold leakage current, etc. also called Short Channel Effects. Thus it imposed limitation to reduced size. Several techniques were suggested to reduce SCEs. One such technique is Double Gate MOSFET which uses the concept of Volume Inversion. Depending upon the requirement electrical characteristics can be obtained by gate or channel engineering. Different papers consisting of different techniques have been reviewed.
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